Year-end Sale % OFF 
Abstract
A high-performance unified RAM without soft programming is demonstrated on a fully depleted FinFET structure. An oxide/nitride/oxide gate dielectric is integrated in a floating-body FinFET, thereby providing the versatile functions of nonvolatile Flash memory and high-speed capacitorless 1T-DRAM. A new read method involving the utilization of a parasitic bipolar junction transistor is employed for the capacitorless 1T-DRAM mode. This manner provides nondestructive reading and a high sensing current window (DeltaI <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">S</sub> > 45 muA). As the nitride traps are filled with holes before activating the capacitorless 1T-DRAM mode, an undesirable contribution of hole trapping on a threshold voltage shift, i.e., soft programming, is inhibited without sacrificing the sensing current window.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
