Parameter modeling for nanopore lonic field effect transistors in 3-D device simulation.

Abstract

An Ion Field Effect Transistor (IFET) with nanopore structure was modeled in a conventional 3-dimensional (3-D) device simulator to understand current-voltage (I-V) characteristics and underlying physics of the device. Since the nanopore was filled with positive ions (K+) ions due to the negative interface charge on the insulator surface and negative gate bias condition, we could successfully simulate the IFET structure using modified p-type silicon to mimic KCl solution. We used p-type silicon with a doping concentration of 6.022 x 10(16) cm(-3) which has the same concentration of positive carriers (hole) as in 10(-4) M KCl. By controlling gate electric field effect on the mobility, the I-V curves obtained by the parameter modeling matched very well with the measured data. In addition, the decrease of [V(th)] with increasing V(DS) was physically analyzed.