Abstract

This study aims to establish a prediction model for the conducted interference of a buck converter system and verify the accuracy of the prediction model through experiments. The prediction model considers each component as an equivalent circuit model that is represented by lumped parameters and introduces the parameter extraction method. For the parameter extraction in the power line model, a numerical computation method that combines partial capacity theory (PCT) and finite element method (FEM) is used. For the modelling of the interference source, a concentrated and equivalent method is used to process synthetically the voltage jumps generated by multiple switching devices as one interference voltage source, which serves as an excitation source for the prediction model. Importantly, a computation model for parasitic capacitance is proposed, and a computation process for parasitic parameters that combine the electrostatic field principle and FEM is derived. Besides, this paper analyses the effects of parasitic parameters on impedance, which interferes with the transmission loop; changes the thickness of the thermal conductive adhesive, which are filled between the transistor heat-conducting plate and heat sink to reduce the conducted interference; verifies the accuracy of the proposed method on reducing electromagnetic interference (EMI) by experiment.

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call