Parallel Logic Simulation: Myth or Reality?

Abstract

The rapid adoption of multiprocessor computers creates a perfect environment for parallel EDA algorithms. Among various EDA applications, parallel logic simulation seems the most promising. As processors become faster and designs grow larger, better performance might well be expected from parallel simulation. However, this is typically not the case. Speedup is difficult to achieve, and pitfalls in evaluating simulation speedup can offer false promises. Is parallel logic simulation a myth or reality? In this article, the authors answer this question from the perspective of an industrial parallel simulation vendor.