Parallel information and computation with restitution for noise-tolerant nanoscale logicnetworks

Abstract

Nanoelectronic devices are anticipated to become exceedingly noisy as they are scaledtowards thermodynamic limits. Hence the development of nanoscale classical informationsystems will require optimal schemes for reliable information processing in the presence ofnoise. We present a novel, highly noise-tolerant computer architecture based on the work ofvon Neumann that may enable the construction of reliable nanocomputers comprised ofnoisy gates. The fundamental principles of this technique of parallel restitution are parallelprocessing by redundant logic gates, parallelism in the interconnects between gate resourcesand intermittent signal restitution performed in parallel. The results of our mathematicalmodel, verified by Monte Carlo simulations, show that nanoprocessors consisting of gates incorporating this technique can be made 90% reliable over 10 years ofcontinuous operation with a gate error probability per actuation of and a redundancy of . This compares very favourably with corresponding results utilizing modular redundantarchitectures of with , and with no noise tolerance. Arbitrary reliability is possible within a noise limit of , with massive redundancy. We show parallel restitution to be a general paradigmapplicable to different kinds of information processing, including neural communication.Significantly, we show how our treatment of para-restituted computation as a statisticalensemble coupled to a heat bath allows consideration of the computation entropy of logicgates, and tentatively sketch a thermodynamic theory of noisy computation that might setfundamental physical limits on scaling classical computation to the nanoscale. Ourpreliminary work indicates that classical computation may be confined to the macroscaleby noise, quantum computation possibly being the only information processing possible atthe extreme nanoscale.