Abstract
In today conventional technology, multi-chip packaging (MCP) technology has become more important and popular with the purpose to increase the density of the integrated electronic and processing power. However, increasing in processing speed and enhanced capabilities for high power chip design, thermal management in MCP has become more challenging in heat dissipation due to multiple heat sources. This paper presents the package layout design optimization which plays an important role in ensuring multi chip assembly design rules are met and several approaches to optimize the placement of two dice in a single package will be presented. This paper also illustrates the overview of thermal analysis in MCP to study the effect of balanced and unbalanced power map to the thermal solution of MCP in relation to junction temperature.
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