Abstract

Due to the increase in integrated circuit technology processing, there is intense flooding of transistors on Multi-processor System-on-chips, making communication a more complex and costly asset. To regulate communication in such a complex environment, Network-on-chip (NoC) came up as a versatile and inflating communication architecture for large SoCs. It tackled various on-chip communication problems and increased performance. It also provided a great power tradeoff for large-scale System-on-chips (SoCs). Routing plays a very vital role in NoCs performance. Routing should not cause any deadlocks in the network as it can degrade the performance. So deadlock-free routing has been and is instill a concern in NoCs. In this paper, we have introduced a novel deadlock-free congestion-aware routing namely PAAD (Partially adaptive and deterministic routing). It is a conjunction of partially adaptive and deterministic routing which switch with each other based on network congestion. Here we have divided a mesh into different diagonal zones and different algorithms are followed in each zone. When there is no congestion, deterministic routing is followed in each zone, and when there is congestion partially adaptive routing is followed. Hence it takes the advantage of both and enhances the overall efficiency. We have compared our model with different algorithms with regard to latency, throughput, and power performance factor for various traffic patterns. The results reveal that our algorithm performs best than the rest.

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