Abstract
Spread Spectrum Clock Generation (SSCG) is an important technique for EMI reduction. It is especially applicable for display electronics since modern society is increasingly equipped with growing number of myriad types of semiconductor display devices. To achieve the goal of lowering peak power, clock signal is intentionally “jittered”. This fact negatively impacts the clock signal integrity. For this reason, the common practice nowadays in industry is to turn off the SSCG function in normal work mode. It is only turned on when the device is actively tested for EMI influence in the lab. In this paper, a novel SSCG technique is presented. It is based on the emerging frequency synthesis technique of Time‐Average‐Frequency Direct Period Synthesis. Its aim is to maximize frequency modulation depth while precisely controls clock’s impact on system operation so that the SSCG function can be “always‐on”.
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