Oxide Traps Probed by Transient Capacitance Measurements on Lateral SiO<sub>2</sub>/4H-SiC MOSFETs

Abstract

In this paper, near interface traps (NITs) in lateral 4H-SiC MOSFETs were investigated employing temperature dependent transient gate capacitance measurements (C-t). The C-t measurements as a function of temperature indicated that the effective NITs discharge time is temperature independent and electrons from NITs are emitted toward the semiconductor via-tunnelling and/or trap-to-trap tunnelling. The NITs discharge time was modelled taking into account also the interface state density in a distributed circuit and it allowed to locate traps within a distance of about 1.3nm from the SiO2/4H-SiC interface.