Overlay progress in EUV lithography towards adoption for manufacturing

Abstract

Extreme Ultra-Violet (EUV) lithography is a candidate for semiconductor manufacturing for the 16nm technology node and beyond. Due to the very short wavelength of 13.5nm, EUV lithography provides the capability to continue single exposure scaling with improved resolution and higher pattern fidelity compared to 193nm immersion lithography. However, reducing the wavelength brings new equipment and process challenges. To enable EUV photon transmission through the optical system, the entire optical path of an EUV exposure tool operates under vacuum, and in addition reticle and optics are reflective. To obtain the required CD and overlay performance, both wafer and reticle front surfaces need to have near-perfect flatness, as non-flatness directly contributes to focus and image placement errors, in the case of the reticle due to non-telecentricity. Traditional vacuum chucks, both for reticle and wafer, cannot be used and are replaced by electrostatic chucks. Any contribution of this new clamping method on CD and overlay control therefore needs to be investigated, including avoidance of particle contamination over time. This work was performed on ASML's EUV Alpha Demo Tool (ADT). We investigated the different, non-conventional contributions to overlay control on the ADT, with particular attention to the wafer clamping performance of the exposure chuck. We demonstrate that we were able to improve the overlay performance by compensating for the wafer clamping error during the wafer alignment sequence. The impact of different wafer types on overlay was also evaluated. In addition to clamping effects, thermal effects have also been shown to impact overlay and were evaluated by monitoring the thermal behavior of a wafer during exposure on the ADT and correlating to the resulting overlay.