Abstract
The origin of negative differential resistance (NDR) and its derivative intermediate resistive states (IRSs) of nanocomposite memory systems have not been clearly analyzed for the past decade. To address this issue, we investigate the current fluctuations of organic nanocomposite memory devices with NDR and the IRSs under various temperature conditions. The 1/f noise scaling behaviors at various temperature conditions in the IRSs and telegraphic noise in NDR indicate the localized current pathways in the organic nanocomposite layers for each IRS. The clearly observed telegraphic noise with a long characteristic time in NDR at low temperature indicates that the localized current pathways for the IRSs are attributed to trapping/de-trapping at the deep trap levels in NDR. This study will be useful for the development and tuning of multi-bit storable organic nanocomposite memory device systems.
Highlights
Suggested that the mechanism is based on the formation of localized current pathways inside the organic material[19]
The noise scaling behavior from the intermediate resistive states (IRSs) and the telegraphic noise in negative differential resistance (NDR) were investigated at a range of temperatures from 80 K to 300 K to observe the electronic dynamics, thereby enabling a better understanding of NDR and the IRSs in organic nanocomposite memory systems
More detailed information for the PS:phenyl-C61-butyric acid methyl (PCBM) material preparation and device measurement are provided in the Methods section
Summary
Ω was unchanged under varying low bias voltages at room temperature (Fig. 2d), indicating that the resistance fluctuation in the PS:PCBM percolating network remains the same under different voltage biases, i.e., the scaling behavior is induced by purely geometrical formation of current pathways in the low bias range[23]. The exponent value of 1.5 at the high voltage bias in Fig. 1d can be explained by the diffusion process caused by a gradient of the local number density of charge carriers trapped in the deep trap levels. The suppression and clear appearance of the telegraphic noise in NDR at low temperature indicates that the charge trapping/de-trapping process at the traps is the principal cause of NDR, and this process results in the intermediate resistive states at low voltage bias via the current pathway formation. The trap formation and distribution in the nanocomposite resistive memory device system will be important in next-generation resistive memory devices; this study will provide a better understanding of resistive memory devices and promote the development of more practical and sophisticated resistive memory devices
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