Optimum Wordlength Search Using Sensitivity Information

Kyungtae Han,Brian L Evans

doi:10.1155/asp/2006/92849

Abstract

Many digital signal processing algorithms are first developed in floating point and later converted into fixed point for digital hardware implementation. During this conversion, more than 50% of the design time may be spent for complex designs, and optimum wordlengths are searched by trading off hardware complexity for arithmetic precision at system outputs. We propose a fast algorithm for searching for an optimum wordlength. This algorithm uses sensitivity information of hardware complexity and system output error with respect to the signal wordlengths, while other approaches use only one of the two sensitivities. This paper presents various optimization methods, and compares sensitivity search methods. Wordlength design case studies for a wireless demodulator show that the proposed method can find an optimum solution in one fourth of the time that the local search method takes. In addition, the optimum wordlength searched by the proposed method yields 30% lower hardware implementation costs than the sequential search method in wireless demodulators. Case studies demonstrate the proposed method is robust for searching for the optimum wordlength in a nonconvex space.

Highlights

Digital signal processing algorithms often rely on long wordlengths for high precision, whereas digital hardware implementations of these algorithms need short wordlengths to reduce total hardware costs
The number of bits assigned to the integer representation is called the integer wordlength (IWL), and the number of bits assigned to the fraction is the factional wordlength (FWL) [17]
Wordlength optimization methods used in case studies are compared in terms of number of iteration and hardware complexity, and future work is discussed

Summary

Introduction

Digital signal processing algorithms often rely on long wordlengths for high precision, whereas digital hardware implementations of these algorithms need short wordlengths to reduce total hardware costs. Determining the optimum wordlength can be time-consuming if assignments of wordlengths are performed by trial and error. Optimum wordlength choices can be made by solving equations when propagated quantized errors [2] are expressed in an analytical form. Computation time, increases exponentially as the number of wordlength variables increases. For these reasons, many simulation-based wordlength optimization methods have explored a subset of the entire space [3,4,5,6,7]. When designers model at a high-level, floating-point numbers are useful to model arithmetic operations. In hardware, floating-point data types are typically converted or built as fixed-point data types to reduce the amount of hardware needed to implement the functionality.

Results

Discussion

Conclusion