Optimum power supply for minimum energy in nano-CMOS circuits

Abstract

Operating complementary metal oxide semiconductor (CMOS) circuits in subthreshold mode of operation is proved to be energy efficient for many applications ranging from biomedical implantable devices to wireless sensors which require ultra-low power consumption. In particular, operating CMOS circuits in subthreshold mode minimizes the energy per operation which has been widely considered as the metric for measuring the power efficiency of the circuit. In this paper, the value of the supply voltage that minimizes the energy per operation in CMOS circuits is determined analytically considering the activity factor, the logic depth and the technology parameters. In addition, another analytical closed-form model is developed to predict the least value of the supply voltage for CMOS circuit to function properly. The developed models target the nano-regime CMOS technology. The simplicity of these models provides a good insight into the factors that affect the subthreshold operation. Despite their simplicity, the produced models show a very good agreement with the simulation results considering 16-nm PTM HP process parameters and different CMOS circuits.