Abstract
In this paper, a nonlinear least squares optimization method is employed to optimize the performance of pole-zero-cancellation (PZC)-based digital controllers applied to a switching converter. An extensively used step-down converter operating at 1000 kHz is considered as a plant. In the PZC technique, the adverse effect of the (unwanted) poles of the buck converter power stage is diminished by the complex or real zeros of the compensator. Various combinations of the placement of the compensator zeros and poles can be considered. The compensator zeros and poles are nominally/roughly placed while attempting to cancel the converter poles. Although PZC techniques exhibit satisfactory performance to some extent, there is still room for improvement of the controller performance by readjusting its poles and zeros. The (nominal) digital controller coefficients thus obtained through PZC techniques are retuned intelligently through a nonlinear least squares (NLS) method using the Levenberg-Marquardt (LM) algorithm to ameliorate the static and dynamic performance while minimizing the sum of squares of the error in a quicker way. Effects of nonlinear components such as delay, ADC/DAC quantization error, and so forth contained in the digital control loop on performance and loop stability are also investigated. In order to validate the effectiveness of the optimized PZC techniques and show their supremacy over the traditional PZC techniques and the ones optimized by genetic algorithms (GAs), simulation results based on a MATLAB/Simulink environment are provided. For experimental validation, rapid hardware-in-the-loop (HiL) implementation of the compensated buck converter system is also performed.
Highlights
Modern-day digital devices such as cellular phones, camcorders, calculators, digital cameras, portable electronic devices, microprocessors, DSP core, handheld computers and PDAs, MP3 personal players, and so on utilize switch-mode power supplies (SMPSs)
When comparing the analog compensators with real and complex zeros and the digital compensators, the following corollaries can be deduced. It is revealed from the inspection of the Bode plots of the open-loop compensated buck converter system that the compensator using the complex zeros at the resonance frequency achieves a phase margin of 84.3◦, as compared to the one with real zeros, which attains a phase margin of 64.6◦
A two-pole two-zero compensator with one of the poles lying at low frequency and real zeros lying in the vicinity of the resonance frequency is characterized by the transfer function as follows:
Summary
Modern-day digital devices such as cellular phones, camcorders, calculators, digital cameras, portable electronic devices, microprocessors, DSP core, handheld computers and PDAs, MP3 personal players, and so on utilize switch-mode power supplies (SMPSs). Well-recognized PZC techniques-based optimized digital controllers are designed for buck converters to display much-improved performance. As far as the literature review is concerned, in [2], a pole-zero-cancellation technique-based digital controller for a buck converter was suggested by Abe et al to improve the performance characteristics. In [14], a Levenberg-Marquardt (LM) and quasi-Newton (QN)-based NLS hybrid method was used efficiently to improve the performance of the designed linear-phase quadrature mirror filter (QFM) bank in the form of mean squares error in passband and stopband regions, as well as peak reconstruction error (PRE) and error in the transition band at quadrature frequency This was accomplished by optimizing the quadratic measure of the ideal characteristics of the prototype filter and filter bank at quadrature frequency.
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