Optimized Design of Carrier Injection Terminal for Reliable Low-Temperature Poly-Si TFTs Under Dynamic Hot-Carrier Stress

Abstract

Dynamic hot-carrier (HC) degradation can be effectively suppressed in four-terminal low-temperature poly-Si (LTPS) thin film transistors (TFTs) with a carrier injection terminal. In order to enhance the reliability of the four-terminal LTPS TFTs, geometry effect of the carrier injection terminal, such as width and location, on the dynamic HC degradation is systematically studied. It shows that a wider carrier injection terminal, which provides more carriers injection, can suppress the degradation more effectively. As for the location, if the injection terminal is adjacent to the edge of the drain depletion region, which extends into the channel at the falling time of the gate voltage pulses, the four-terminal TFTs can provide the best immunity to the dynamic HC degradation. The proposed optimization scheme can greatly enhance the reliability of LTPS TFTs, and the mechanism can be understood based on the nonequilibrium p-n junction degradation model.