Abstract
The relevant cooling action ensured by the thermal vias in PCB-based power circuits allows extending the operating conditions of the semiconductor devices. However, to properly drain off the power dissipated in the active regions, efficient thermal designs must be developed. To further reduce the devices operating temperature, a strategy to take advantage of the unexploited PCB areas surrounding the device footprint is proposed and discussed in this paper. The analysis is carried out by means of 3-D FEM thermal simulations performed in the COMSOL Multiphysics environment. This investigation is devoted to providing guidelines for an optimum design of thermal vias by accounting for their main geometrical features.
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