Optimization of the breakdown voltage in LDMOS transistors using internal field rings

Abstract

It is shown that field rings in the drift region of LDMOS (lateral double diffused MOS) transistors can be used to reduce the electric field at the Si/SiO/sub 2/ interface and increase the breakdown voltage of the structure. A first order analytical approach shows the upper limit of the position of the ring with respect to the channel, and the doping concentration within the ring to increase the breakdown voltage. A 2-D numerical calculation of the breakdown voltage and on-resistance of the LDMOS transistor is presented. The results, which support the analytical approach, allow the designer to use simple design rules for the implantation of high-voltage LDMOS transistors on thick epitaxial layers. A potential improvement of the breakdown voltage arises if the distance between the channel and the field ring is equal to the field plate length and the doping concentration in the ring satisfies a specified equation. Doubling the breakdown voltage is associated with a 25% increase in device area. The on-resistance depends mainly on the field ring position with respect to the channel. A good tradeoff between the breakdown voltage and on-resistance is obtained when the channel-ring distance is equal to the field plate length. >