Abstract
In this work, a summary of our recent studies on the potential of HfO2/ AhO3 nanolaminated stacks to be implemented as charge storage layers in CTMs is presented. The stacks are prepared by atomic layer deposition (ALD) and fabrication process is optimized in terms of the stack composition (HfO2 and Al2O3 layer numbers and thicknesses) and the post-deposition annealing (PDA) ambient (O2, N2) in order to enhance electrical and charge trapping properties of the stacks. The influence of blocking and tunnel oxide layers is considered. Radiation hardness of some samples is also studied. The charge trapping efficiency of the structures has been evaluated and different processes giving rise to hysteresis effects: trapping of electrons and holes and generation of positive charge under high electric field stress have been considered to explain the observed memory windows.
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