Optimization Design of CRC Circuit in UHF RFID Tag Baseband

Abstract

Aiming at the requirements of EPC Class1 Generation2 (EPC C1G2) and the GB/T 29768 Information Technology Radio Frequency Identification 800/900MHz Air Interface Standard, the paper presented an optimization design of CRC Circuit in UHF RFID Tag baseband. First, the principle of CRC and RFID tag baseband structure are described; To optimize the power consumption and work efficiency of the cyclic redundancy check (CRC), the CRC unit is designed by parallel calculation and circuit multiplexing, then RTL-level coding and function simulation are carried out for the CRC unit; At last, using the SMIC 0.18μm process library to synthesize the logic circuit. The experimental results show that the optimized design is superior to the traditional serial circuit. The hardware area is reduced by about 29%, the timing is reduced by about 22.3% and the total dynamic power consumption is reduced by a small amount.