Optimization and Performance Prediction of Tunnel Field‐Effect Transistors Based on Deep Learning

Abstract

AbstractThe tunnel field‐effect transistor (TFET) is considered to be a suitable substitute for metal oxide semiconductor‐field effect transistors in the post‐“Moore's Law” era owing to its low power consumption. However, Si‐TFETs face the drawbacks of low on‐state currents and significant ambipolar leakage. This study proposes a GeSi/Si heterojunction double‐gate TFET with a T‐channel hetero‐gate dielectric (HJ‐HGD‐DGTFET) structure to overcome these problems. It also presents a novel method of predicting and optimizing the performance of the existing TFETs which use deep learning to accelerate the device design. Furthermore, this study proposes a neural network based on different requirements to perform two functions: prediction of the device performance using the forward design, and the forecast of the device structure using the inverse design. It can thus be used to determine whether the output of the network meets the design objectives and if it is necessary to change the output by adjusting the input, and lastly achieve the TFET performance prediction and device optimization. The proposed method can be used to design TFETs accurately and efficiently even without professional knowledge. This study provides guidance for the design and optimization of TFETs along with other microelectronic devices.