Abstract
An important step in the production of integrated circuits is the projection of the pattern of electronic connections on a silicon wafer. The light used to project the pattern moves over the wafer and induces a local temperature increase. The resulting thermal expansion of the wafer leads to a significant reduction in the imaging quality of next-generation wafer scanners. Thermal actuators that move together with the projection light can be used to improve the imaging quality. Because the placement of these actuators largely determines the performance of the resulting control system, a method to support the design of an effective thermal actuator layout is presented. The proposed method computes the smallest actuation heat load that consists of a single spatial shape and respects certain constraints on wafer deformations. A gradient-based optimization algorithm is presented to compute the optimal actuation heat load. The proposed method is applied to a wafer heating problem for which the resulting shapes of the actuation heat load have a clear physical interpretation.
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