Abstract
As ULSI technology moves below the 180nm technology node, tight control of the depth of ultra-shallow junctions (USJ), such as those used in source-drain extensions, becomes critical. The problem is one of both local control and uniformity over the full area of 200 and 300mm wafers. This paper describes the status of carrier illumination™ (CI), an optical method for measuring the active junction depth for ultra-shallow source-drain extensions. It features a non-destructive, high throughput measurement with a spot size of less than 2μm. This provides rapid uniformity measurements on patterned wafers, enabling in-line control of USJ processes. CI is based on injecting excess carriers that line up with the active doping profile. These carriers act as a “contrast agent” allowing an optical interferometer to measure their profile. The active junction depth may then be deduced from the interferometer signal. This paper first describes the CI measurement and motivation for its development. It then presents a summary of qualification results on PMOS and NMOS process flows. These demonstrate use of the measurement at the process steps associated with extension and source/drain (SD) formation, on both bare and patterned wafers. Correlation is shown to SIMS, SRP, sheet resistance, and transistor and test structure electrical measurements.
Published Version
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