On-chip static and dynamic monitors for low power applications

Abstract

Due to the increasing demand for battery-operated mobile devices in the market, low power consumption inside the chip is an essential ingredient during the chip design. Static and dynamic monitors are needed to achieve low power in modern chips. The static or process monitor provides information about global and local process variation inside the chip. The dynamic or in situ monitor provides information about the global, local, and environmental variation on the critical path of the design inside the chip. In this work, a static monitor is discussed using a reconfigurable ring oscillator which extracts the threshold voltage information. A dynamic monitor using warning flip-flop is discussed which can be used for dynamic voltage and frequency scaling to achieve low power consumption. Both static and dynamic monitors are experimentally validated in a test chip, that is implemented in CMOS 130 nm technology node.