On-chip spiral inductor in flip-chip technology

Abstract

Performance comparison is made between on-chip spiral inductor in flip-chip versus wirebond package technology. Full-wave electromagnetic simulation and on-strip measurement techniques were used to study the performance fluctuations of inductor within flip-chip environment. Results show that the performance of a flipped silicon-based spiral inductor is affected by the radio frequency (RF) current return path differences. The RF current return path for flip-chip is concentrated on the surface of silicon layer exclusively because back side ground under silicon is floating in flip-chip technology. In addition, the bump proximity effect is also considered. On-chip inductors in flip-chip environment must be optimized by reducing the eddy current in the silicon substrate and parasitic affects by adjusting design parameters. The equivalent circuit model of the flipped on-chip spiral inductor is verified with measured results over broadband frequencies. Also, the RF flip-chip characterization technique using on-strip measurement method is presented.