On-Chip Health Monitoring Based on DE-Cluster in 2.5D ICs

Abstract

2.5-dimensional integrated circuits (2.5D ICs) are considered today as a promising solution for overcoming the bottlenecks introduced by technology scaling. In 2.5D ICs, the circuit failures are also inevitable to arise, mainly because of timing variations induced by runtime and process variations as well as transistor aging which result in path delay. However, the increase of density and complexity of circuits in 2.5D ICs brings more challenges to the detection of in-field path delay. It is feasible to track the delay of every critical path due to the unaffordable overhead of sensors or test patterns. In this paper, we propose to adopt the DE-based clustering algorithm to select a set of representative critical paths. Therefore, by only testing the delay of the selected small number of paths, the concerning parameters of these circuits are derived and used to infer the delay of a large number of the rest paths which are probably to fail due to timing variations. We simulate the proposed approach on benchmark circuits, and the results demonstrate the effectiveness for the collaborative optimization of representative critical path number and delay prediction accuracy.