On Zero Steady-State Error Voltage Control of Single-Phase PWM Inverters With Different Load Types

Abstract

This paper comprehensively investigates and compares different multiloop linear control schemes for single-phase pulsewidth modulation inverters, both in stationary and synchronous (d -q) frames, by focusing on their steady-state error under different loading conditions. Specifically, it is shown how proportional plus resonant (P + R) control and load current feedback (LCF) control can, respectively, improve the steady-state and transient performance of the inverter, leading to the proposal of a PID + R + LCF control scheme. Furthermore, the LCF control and capacitive current feedback control schemes are shown to be subject to stability issues under second and higher order filter loads. Additionally, the equivalence between the stationary frame and d -q frame controllers is discussed depending on the orthogonal term generation method, and a d-q frame voltage control strategy is proposed eliminating the need for the generation of this orthogonal component. This is achieved while retaining all the advantages of operating in the synchronous d-q frame, i.e., zero steady-state error and ease of implementation. All theoretical findings are validated experimentally using a 1.5 kW laboratory prototype.