On using adversary simulators to evaluate global fixed-priority and FPZL scheduling of multiprocessors

Abstract

There are many real-time systems where it is useful to have an estimate for the worst-case response time of each task. Simulators can be used to establish a lower bound on the worst-case response time. But classic simulators apply arrival patterns originally conceived for uniprocessor and fail to achieve a good estimate for the worst-case response time when multiprocessors are used. An adversary simulator generates arrival patterns to stress the processing capacity of the system and, in this way, to obtain tighter estimates. In this paper we present a new heuristic for adversary simulators specifically designed for fixed-priority zero-laxity (FPZL) scheduling. This new adversary algorithm is simple and fast, and it works with both deadline monotonic (DMPO) and deadline minus computation monotonic (DCMPO) priority assignment policies. The evaluation shows that the adversary simulator proposed in this paper is more effective when FPZL scheduling is used. We also compare four scheduling approaches (FP-DMPO, FP-DCMPO, FPZL-DMPO and FPZL-DCMPO) using an appropriate adversary simulator for each one.