On the UTBB SOI MOSFET performance improvement in quasi-double-gate regime

Abstract

This work investigates the simultaneous electrostatic improvement and performance enhancement of UTBB SOI MOSFETs obtained in quasi-double-gate (QDG) regime (i.e. simultaneously biasing gate and substrate (or ground plane) as V sub =k∗V g ) as a strong function of k-multiplication factor, when compared to a standard single-gate mode. QDG mode is demonstrated to allow threshold voltage tuning and on-current enhancement without off-state current degradation, of interest for digital applications (e.g. switches). Improved performance in QDG mode combined with lowered DIBL and enhanced gain are of interest for high-precision low-frequency analog applications. The work finally quantifies the resulting gate area decrease in QDG mode, potentially exploitable in actual circuit implementations.