Abstract
In past decades, the electronic industry has been following the Moore's law to improve the performance of CMOS integrated circuits (IC). However, it will probably be impossible to follow this law in the future due to physical limitations appearing with the miniaturization of the transistors below a certain threshold. In order to overcome this problem, new technologies have emerged, and among them the 3D-Stacked Integrated Circuits (3D-SIC) have been proposed to keep the Moore's momentum alive. 3D-SICs can bring numerous advantages in the design of future ICs but at the cost of additional design complexity due to their highly combinatorial nature, and requiring the optimization of several conflicting criteria. In this paper, we present a preliminary study of tools that can help the design of 3D-SICs, using multi-criteria analysis. Our study has targeted one of the main issues in the design of 3D-SICs: the floorplanning. This work has shown that the use of Multi-Criteria Decision Aid (MCDA) tools can provide relevant and objective analysis of the problem that may not be feasible with the current design methods. We believe that these promising results will allow designers to overcome the complexity of designing 3D-SICs.
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