On the use of hardware description languages in teaching VLSI design courses

Abstract

The advent of VLSI technology and the increasing complexity of digital systems has led to the development of sophisticated CAD tools that use hardware description languages (HDLs) to describe hardware designs at various levels. Based on recent industry shifts, it has become clear that HDLs are rapidly becoming an integral part of design automation environments. This will create a demand for future engineers who are well-trained in HDL-based design methodologies. It has become necessary to introduce related courses at the undergraduate level. In this paper, we address issues pertaining to the introduction and teaching of such courses.