On the jitter and entropy of the oscillator-based random source

Abstract

True Random Number Generator (TRNG) is a research hotspot recently because it is the main part of many security chips. Random source is considered to be a pillar of TRNG. There are many types of TRNG and oscillator-based random source is widely used on chip. The design of it exploits the random cycle-to-cycle time drift(jitter) in clock of low frequency to produce random bit sequence. Entropy is a basic metric of randomness. In order to increase the randomness of sequence we have to increase the jitter in clock. In this work we propose a method to find the relationship between jitter and the entropy of a bit sequence. First we calculate the possibility of a single bit under the assumption of the normal distribution. Then we give the algorithm of L-bit entropy in the worst case. Finally, we generate a series of bit sequence with different jitters and calculate the entropy with the test of AIS31. Moreover, the paper will also analyze the threshold of the ratio of jitter and period to get a bit sequence with high randomness. From our theory and experimental results, if the ratio is greater than 9.16, the raw sequence has adequate randomness. This threshold is useful to the designers of TRNG.