On the Evaluation of Gate Dielectrics for 4H-SiC Based Power MOSFETs

Muhammad Nawaz

doi:10.1155/2015/651527

Abstract

This work deals with the assessment of gate dielectric for 4H-SiC MOSFETs using technology based two-dimensional numerical computer simulations. Results are studied for variety of gate dielectric candidates with varying thicknesses using well-known Fowler-Nordheim tunneling model. Compared to conventional SiO2as a gate dielectric for 4H-SiC MOSFETs, high-kgate dielectric such as HfO2reduces significantly the amount of electric field in the gate dielectric with equal gate dielectric thickness and hence the overall gate current density. High-kgate dielectric further reduces the shift in the threshold voltage with varying dielectric thicknesses, thus leading to better process margin and stable device operating behavior. For fixed dielectric thickness, a total shift in the threshold voltage of about 2.5 V has been observed with increasing dielectric constant from SiO2(k=3.9) to HfO2(k=25). This further results in higher transconductance of the device with the increase of the dielectric constant from SiO2to HfO2. Furthermore, 4H-SiC MOSFETs are found to be more sensitive to the shift in the threshold voltage with conventional SiO2as gate dielectric than high-kdielectric with the presence of interface state charge density that is typically observed at the interface of dielectric and 4H-SiC MOS surface.

Highlights

Power semiconductors provide basic building block in almost all energy conversion, transmission, and distribution networks used today
While dielectric constant of HfO2 is larger than that of SiO2, a narrow bandgap of HFO2 results in smaller conduction band offsets with respect to silicon carbide (SiC) material (Figure 3(a)). With these small conduction band offset values, the probability of carriers tunneling through the dielectric is increased significantly and it may limit the purpose of using this high-k material
Note that simulation of new dielectric layer stack with additional SiO2 has been ignored here primarily because band alignment values are not available for the whole layer stack of HfO2/SiO2/4H-SiC [35]. This may be the objective of future work where new dielectric combinations are assessed for surface passivation and as gate dielectric material for SiC based metal oxide semiconductor field effect transistors (MOSFETs)/IGBTs

Summary

Introduction

Power semiconductors provide basic building block in almost all energy conversion, transmission, and distribution networks used today. Similar to conventional low power devices using highk gate dielectric over Si, one of the major challenges is the significantly lower channel mobility for the SiC-MOSFETs due to high interface state density and interface surface roughness through scattering and trapping effects for the carriers at SiO2/SiC interface. This surface roughness poses threat to the gate oxide reliability and further leads to instability of the threshold voltage. It is objective of this work to investigate various dielectrics that can be employed as a potential candidate for 4H-SiC based

Device Simulation Setup

Results and Discussion

Conclusions