On the effects of the average power of training sequences used to synthesize memory digital predistorters in WCDMA transmitters

Abstract

In this paper, a study of the effects of the average power of the training sequences used in characterizing the power amplifier on the performance of synthesized memory polynomial digital predistorters is presented. This study was carried out on a 3G 100-Watt peak power amplifier operating over a 12 dB average input power range. The amplifier was characterized over this power range in steps of 1 dB, and the corresponding memory polynomial predistortion function was derived at each operating average power. It was shown that the average power mismatch between the power amplifier and the predistorter degraded the adjacent channel power ratio of the linearized amplifier by up to 9 dB. The predistorter’s parameters variation with the average input power was then investigated. Consequently, a nonlinear filter bank was proposed to store the memory polynomial coefficients as a function of the average power levels. The memory bank is added to the predistorter along with an average power estimator, in order to maintain the performance of the linearized amplifier over the entire input power range.