On the avalanche multiplication mechanism in SPICE simulations of high-frequency bipolar transistors with thin basewidths and low breakdown voltages

Abstract

A very simple subcircuit model for SPICE simulation of bipolar transistors affected by the avalanche multiplication mechanism is presented. The currently available models for bipolar transistors in circuit simulators do not consider this effect, which can lead to serious simulation errors when high-frequency thin basewidths transistors with low and soft breakdown voltages are simulated. The simulated results predicted by SPICE with the proposed subcircuit are compared with the measured data obtained from several transistors with low and soft breakdown voltages and a good agreement is reported.