Abstract

We present a systematic study of Si dopant implantation and activation in p-type In0.53Ga0.47As in an attempt to optimize the source and drain regions of an n-channel III-V metal–oxide–semiconductor field-effect transistor. Test structures based on the transfer length method were fabricated on Si-implanted p-In0.53Ga0.47As/p-InP buffer/semi-insulting InP. A Doehlert design of experiment (DOE) was used to investigate the effect of annealing temperature and time on the electrical properties of the samples. The DOE covered an experimental domain of 625–725 °C and 15–45 s. The current–voltage characteristics of all tested structures exhibited excellent ohmic behavior. The DOE revealed a minimum sheet resistance of (195.6 ± 3.4) Ω/□ for an optimum anneal condition of 715 °C for 32 s. Nonalloyed Au/Ge/Au/Ni/Au contacts, on the sample annealed at 675 °C for 30 s (center point of the experimental domain), exhibited a low specific contact resistance of (7.4 ± 4.5) × 10−7 Ω cm2. The sample annealed at 675 °C for 30 s was further investigated using secondary ion mass spectrometry (SIMS) and cross-sectional transmission electron microscopy (XTEM) analyses. SIMS revealed that Si ions did not diffuse with annealing, while XTEM showed the formation of characteristic loop defects potentially responsible for the sheet resistance and specific contact resistance degradation.

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