On reduction of high-frequency noise in low-current silicon BTs

Abstract

Papers [1, 2] by the authors of the present work propose and develop a new approach to modeling thermal (or carrier-velocity-fluctuation) noise in semiconductor devices and integrated circuits. The approach combines theory of Itô's stochastic differential equations and device/circuit theory. This innovative combination enables to form consistent mathematical basis of noise modelling and simulation. The present work is the next step in this development. It proposes a method to reduce high-frequency values of spectral densities of terminal currents in low-current silicon bipolar transistors (BTs) including modern high-speed (multigigahertz) devices. This method presents the "anti-resonance" structural modification of two-junction devices. The corresponding numerical results are calculated by the QuAnT software intended for computer-assisted learning. These data demonstrate 2-5-order reduction in the high-frequency spectral densities for a 24-GHz silicon BT at only 12% deterioration in its speed performance. The method points out the triple-diffusion-or-implantation (TDI) structure and its optional silicon-on-insulator-and-trench-isolation (SOI/TI) version as the device structures which enable to implement the proposed method. It is noticed that optimization of the conventional (rather than the above special) SOI/TI structure for high speed disagrees with the optimization for low level of high-frequency noise. High-frequency-noise minimization and speed-performance maximization are in general contradictory strategies in design of silicon BTs. An appropriate balance between them can be achieved by means of the proposed method and application of the relevant quantative-analysis tools like the QuAnT software or any other software of more capabilities.