Abstract
The Exponential-Time Hypothesis (ETH) is a strengthening of the đ« â đ©đ« conjecture, stating that 3- SAT on n variables cannot be solved in (uniform) time 2 Î”Ä n , for some Δ > 0. In recent years, analogous hypotheses that are âexponentially strongâ forms of other classical complexity conjectures (such as đ©đ«â âŹđ«đ« or co đ©đ«âđ©đ«) have also been introduced and have become widely influential. In this work, we focus on the interaction of exponential-time hypotheses with the fundamental and closely related questions of derandomization and circuit lower bounds . We show that even relatively mild variants of exponential-time hypotheses have far-reaching implications to derandomization, circuit lower bounds, and the connections between the two. Specifically, we prove that: (1) The Randomized Exponential-Time Hypothesis (rETH) implies that âŹđ«đ« can be simulated on âaverage-caseâ in deterministic (nearly-)polynomial-time (i.e., in time 2 Ă(log( n )) = n loglog( n ) O(1) ). The derandomization relies on a conditional construction of a pseudorandom generator with near-exponential stretch (i.e., with seed length Ă(log ( n ))); this significantly improves the state-of-the-art in uniform âhardness-to-randomnessâ results, which previously only yielded pseudorandom generators with sub-exponential stretch from such hypotheses. (2) The Non-Deterministic Exponential-Time Hypothesis (NETH) implies that derandomization of âŹđ«đ« is completely equivalent to circuit lower bounds against â°, and in particular that pseudorandom generators are necessary for derandomization. In fact, we show that the foregoing equivalence follows from a very weak version of NETH, and we also show that this very weak version is necessary to prove a slightly stronger conclusion that we deduce from it. Last, we show that disproving certain exponential-time hypotheses requires proving breakthrough circuit lower bounds. In particular, if CircuitSAT for circuits over n bits of size poly(n) can be solved by probabilistic algorithms in time 2 n /polylog(n) , then âŹđ«â° does not have circuits of quasilinear size.
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