Abstract
ABSTRACTThe on-chip meander line n-well resistor with a shielded ground conductor inserted parallel between the meander line on the silicon substrate is studied. The new design configuration concept with the shielded ground conductor improved the Q factor compared to those without the shielded ground conductor operating at high frequency. It was confirmed that the design configuration for the shielded ground conductor with a larger coverage area and increasing the number of parallel with the meander signal line was significant in improving the Q-factor performance operating at high frequency. Using this improvement method, the Q-factor value for proposed design meander line n-well structure with shielded ground conductor at 2 µm width in two T shapes has improved around 8% to 9% at 8, 9, and 10 GHz and reduced the parasitic mutual capacitance by 49.35 fF at 10 GHz when compared to the conventional structure of meander line n-well resistors. Shielded ground conductor technique is effective due to reduction of parasitic mutual capacitance. The resulting simulation of the return loss was improved using the shielded ground conductor method, but has poor of insertion loss, due to the skin effect. Overall, it has better performance compared to other designs because it has had significant improvement for Q factor to beyond 4 GHz and better return loss for all the range of frequency.
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