Offset-Canceling Current-Sampling Sense Amplifier for Resistive Nonvolatile Memory in 65 nm CMOS

Abstract

Resistive nonvolatile memory (NVM) is considered to be a leading candidate for next-generation memory. However, maintaining a target sensing margin is a challenge with technology scaling because of the increased process variation and decreased read cell current. This paper proposes an offset-canceling current-sampling sense amplifier (OCCS-SA) that is intended for use in deep submicrometer resistive NVM. The proposed OCCS-SA has the three major advantages of: 1) offset voltage cancellation; 2) double sensing margin structure; and 3) strong positive feedback. The measurement results from a 65 nm test chip show that the proposed OCCS-SA achieves 2.4 times faster sensing time ( $t_{\mathrm {\mathbf {SEN}}}$ ) at a nominal supply voltage ( $V_{\mathrm {\mathbf {DD}}}$ ) of 1.0 V and a greater than 20% reduction in $V_{\mathrm {\mathbf {DD}}}$ at the same $t_{\mathrm {\mathbf {SEN}}}$ , compared to the state-of-the-art current-sampling-based SA, which features offset voltage cancellation and weak positive feedback.