Offset Cancellation and Programmable Gain Design for Switched Capacitor Amplifier in Digital DC-DC Converter

Abstract

This paper presents a fully differential switched capacitor amplifier with programmable gain design and offset cancellation technique used in digital DC-DC converter. To trade off the effective resolution for dynamic range of the error ADC, the gain of the switched capacitor amplifier is designed programmable that can be configured 1X, 2X, 4X or 8X. To improve system offset performance, the first stage is utilized full-differential switch-capacitor architecture conducive to common mode noise rejection and differential offset cancellation caused by charge injection. In addition, to cancel the offset brought by amplifier input stage, offset cancellation techniques are also implemented. The offset voltage is stored in calibration capacitor in sampling phase and cancels the input offset in amplification phase. This proposed circuit is simulated in 180nm 4P6M CMOS technology. From the simulation result, the offset voltage is fully cancelled. In addition, programmable gain design is also verified that dynamic adjustment accuracy in DC-DC feedback loop in X8 is superior than X1.