Abstract
The trapping characteristics of positive bias temperature instability (PBTI) on a high-k/metal gate n-type metal oxide semiconductor field effect transistor (nMOSFET) have been investigated with a complementary multi-pulse technique (CMPT) in detail. With the CMPT technique, we found the threshold voltage shifts after PBTI are higher than that with the conventional direct current method, and the thickness of the SiO 2 interfacial layer has a significant effect on the measured results. The observation of these new results is attributed to the CMPT technique has the unique feature of effectively reducing the detrapping effect induced by the large bulk traps existed in high-k dielectrics. Besides, based on the results, the mechanism of PBTI in metal gate/high-k nMOSFETs is re-modeled.
Published Version
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