Abstract
We investigate the temperature accelerated recovery from hot-carrier (HC) damage with the help of local polycrystalline heating structures in n-MOSFETs designed for power applications. These devices have a rather thick gate oxide and long channel, which assures that mainly interface traps are created through the HC stress. We further verify with frequency-dependent charge pumping that in our devices border traps are of vanishing importance compared to interface traps. We analyze the time and temperature dependence of the recovery of the interface traps after HC stress using models from the literature. The data are fairly consistent with the assumption of interfacial silicon dangling bonds that become passivated by hydrogen. The forward passivation energy is found to be normally distributed because of the distribution of atomic defect configurations. The distribution parameters are independent of the overall degradation level which shows that the passivation process is limited by the bond association kinetics rather than hydrogen supply. Our results are of importance for HC research as well as for the ongoing discussion regarding the quasi-permanent component of bias temperature instability.
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