Abstract
We investigate the temperature accelerated recovery from hot carrier (HC) damage in nMOSFETs designed for power applications. These devices have a rather thick gate oxide and long channel which assures that mainly interface traps are created through the HC stress. We analyze the time and temperature dependence of the recovery of interface traps after HC stress using models from literature. The data is fairly consistent with the assumption of interfacial silicon dangling bonds which become passivated by molecular hydrogen. The passivation energy is found to be normally distributed due to the distribution of atomic defect configurations. The distribution parameters are independent of the overall degradation level which indicates that the passivation process is limited by the bond association kinetics rather than hydrogen supply. By comparing the recovery of HC degradation and bias temperature instability (BTI) we find that the quasi-permanent component of BTI is not the same as the one built up during HC stress and may possibly contain two types of defects.
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