Novel SiC-trench-MOSFET with reduced oxide electric field

Abstract

It has been shown theoretically that the specific on-resistance of the drift region of SiC metal oxide semiconductor field effect transistor (MOSFET) is about 200 times lower than that of a Si MOSFET with the same breakdown voltage (Bhatnagar and Balaiga, 1993). However, the blocking performance of the trench MOSFET (TMOSFET) is limited by the breakdown of the gate dielectric and not by avalanche breakdown in the SiC (Agarwal et al., 1996). Our analysis indicates that this is because the electric field in the SiO/sub 2/ gate dielectric exceeds the dielectric breakdown field strength when high voltages are being blocked by the MOSFET well before the electric field in the SiC is high enough to cause avalanche breakdown in the semiconductor. This paper will introduce, for the first time, a P-type polysilicon filled trench (P-trench) in the TMOSFET that is deeper than the trench gate. The high electric field stress in the oxide is moved to the corner of the P-trench. Hence, the electric field problem can be solved without the need to replace the SiO/sub 2/ with high dielectric constant gate insulators as suggested by others (Sridevan and Baliga, 1997).