Novel radiation-hardened-by-design (RHBD) 14T memory cell for aerospace applications in 65 nm CMOS technology

Abstract

With the reduction of MOS transistor process size, the ability of static random access memory (SRAM) to resist single event upset plays an important role in reducing the soft error rate of chips. In this paper, a novel Radiation Hardened By Design Cell (RHBD-14T) using source isolation technology to reduce the number of sensitive nodes is proposed, compared with the following latest radiation-hardened memory cells (WE-Quatro, RHPD-12T, SAR-14T, SEA-14T, QUCCE-12T, SARP-12T, EDP-12T, QCCS, SCCS and SERSC-16T), the proposed RHBD-14T saves 0.5%, −5.3%, 100.2%, 83.6%, −18.5%, −22.8%, 83.7%, 72%, −2.1%, 171% of read-delay time and −13.4%, −36.3%, −34.4%, 24.1%, 8.4%, 153.1%, 47.8%, 14.7%, −2.8%, −32.8% of write delay time, respectively. In addition, RHBD-14T has the smallest power consumption and the largest hold static noise margin (HSNM), read static noise margin (RSNM) and charge-SNM to power-area-delay (QSPAD), which means it is more suitable for radiation intensive space environment.