Abstract
Low-power operations can be great advantageous for ReRAM devices. However, wasteful overwriting such as the SET operation to low-resistance state (LRS) device and the RESET operation to high-resistance state (HRS) device causes not only an increase in power but also the degradation of the write cycles due to repeatedly rewriting. Thus, in this paper, we proposed a novel automatic avoidance circuit for dealing with wasteful overwriting that uses a sense amplifier and estimated the energy consumption reduction rate by conducting a circuit simulation. As a result, this circuit helped to reliably avoid the wasteful overwriting operation to reduce about 99% and 97% of wasteful energy using VSRC and CSRC, respectively.
Highlights
Resistance random access memory (ReRAM) has been widely expected for use as the generation nonvolatile memory because of its superior characteristics, such as low voltage operation, high-speed performance, and low power
We propose two write circuits to avoid the wasteful overwrite that are composed of a voltage sense amplifier (VSA) and a current sense amplifier (CSA) because we compare the
In the second RESET operation, this operation is unnecessary because the resistance state of this device has already transited to high-resistance state (HRS) in the first RESET operation
Summary
Resistance random access memory (ReRAM) has been widely expected for use as the generation nonvolatile memory because of its superior characteristics, such as low voltage operation, high-speed performance, and low power. In this proposed scheme, write operation can be conducted during read operation, so full read operation is not necessary, and this circuit has some advantage in aspects of speed and power. We call these circuits a voltage sense rewriting circuit (VSRC) and a current sense rewriting circuit (CSRC)
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