Abstract

In this paper, a kind of four-layer stack capacitor is proposed, which has realized the compatibility with the conventional standard 0.5μm CMOS technology. The effective capacitance per area of the proposed stack capacitor is about three times larger than that of the mono-layer MOS capacitor. The Simulation Program with Integrated Circuit Emphasis (SPICE) model of the presented four-layer stack capacitor has been also established with considering the fringe effect. The results show that the root mean square error of the proposed SPICE model is less than 2%. The model has been applied in the simulation design of the infrared focal plane array readout circuit (IRFPA ROIC) successfully. Based on the improved 0.5μm CMOS process with four-layer stack capacitor, an IRFPA ROIC with 640×512 array has been implemented and the dynamic range is improved from 73db to 78dB.

Highlights

  • Infrared focal plane arrays have a wide range of industrial, medical, and scientific applications

  • The infrared focal plane array readout circuit (IRFPA readout integrated circuit (ROIC)) [1,2,3], as the critical part of the dynamic range, can deal with the weak electrical signal sensed by the detector

  • A kind of four-layer stack capacitor is proposed, which has realized the compatibility with the conventional standard 0.5μm CMOS technology

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Summary

INTRODUCTION

Infrared focal plane arrays have a wide range of industrial, medical, and scientific applications. Enhancing the capacitance of integrating capacitor at the limited pixel cell area is the most effective way to improve the performance of the dynamic range. Compared with mono-layer MOS capacitor [9,10], it can largely enhance the capacity of integrating capacitor at the limited pixel cell area. This four-layer stack capacitor is more competitive to balance the relationship between the capacitance of integrating capacitor and the occupying space. Based on the improved 0.5μm CMOS process, a kind of IRFPA ROIC with 640×512 array has been implemented, and the test results show that the enhanced capacity of the integrating capacitor has improved the performance of the dynamic range effectively

THE STRUCTURE OF CAPACITOR
THE SPICE MODEL OF MOS CAPACITOR
THE SPICE MODELS OF MIM CAPACITOR AND PIP CAPACITOR
THE VERIFICATION OF SPICE MODELS
THE STRUCTURE OF INFRARED READOUT CIRCUIT
THE STRUCTURE AND OF PIXEL UNIT CIRCUIT
THE STRUCTURE OF COLUMN PATH
SIMULATION RESULTS OF THE WHOLE CIRCUIT
TEST RESULT
Findings
CONCLUSION
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