Novel Multi-Level Cell TFT Memory With an In–Ga–Zn-O Charge Storage Layer and Channel

Abstract

Amorphous indium–gallium–zinc oxide (a-IGZO) thin-film transistor nonvolatile memory devices with an IGZO charge storage layer were evaluated for the first time for multi-level cell memory applications. The pristine device was defined as the original state (OS), which can be switched to the programmed state (PS) after a positive gate voltage pulse (for example, 12 V for 10 ms), and to the erased state (ES) after a negative gate voltage pulse (for example, −15 V for 10 ms). The writing mechanism was attributed to Fowler–Nordheim tunneling of electrons from the channel to the charge storage layer under a positive gate bias and inverse tunneling under a negative gate bias. The devices demonstrated superior electrical programmable and erasable characteristics. A memory window of 2.4 V between OS and PS was maintained after 100 programming/erasing cycles, and a memory window of 2.66 V between OS and ES as well. The memory windows relative to OS are equal to 1.91 and 1.30 V for PS and ES, respectively, for a retention time of $10^{5}$ s.