Abstract

Notice of Violation of IEEE Publication Principles<br><br>"A BiCMOS SiGe Direct-Conversion DBS Satellite TV Tuner with on-chip ADCs for SiP Integration with a CMOS Demodulator-on-Host"<br>by A. Maxim,<br>in the Proceedings of the Bipolar/BiCMOS Circuits and Technology Meeting, 2007. BCTM '07. IEEE<br>Sept. 30 2007-Oct. 2 2007 Page(s):90-97<br><br>After careful and considered review, it has been determined that the above paper is in violation of IEEE's Publication Principles.<br><br>Specifically, the paper contains information that Adrian Maxim admits had been falsified. In response to an inquiry on this misconduct, Mr. Maxim acknowledged that the following people who have been listed as co-authors on several of his papers are fabricated names and that he is the only author:<br><br>C. Turinici, D. Smith, S. Dupue, M. Gheorge, R. Johns, D. Antrik<br><br>Additionally, in papers by Mr. Maxim that have co-authors other than those listed above, it was discovered in some cases that he had not consulted with them while writing the papers, and submitted papers without their knowledge.<br><br>Although Mr. Maxim maintains that not all of the data is falsified, IEEE nevertheless cannot assure the integrity of papers posted by him because of his repeated false statements.<br><br>Due to the nature of this violation, reasonable effort should be made to remove all past references to the above paper, and to refrain from any future references. <br/> Partitioning a DBS satellite TV receiver in a front-end RF-to-digital tuner that includes the baseband ADC converters and a digital-only demodulator-on-host resulted in a low cost and a good isolation between the analog front-end and the digital back-end, having no interface components and noise coupling issues. The two ICs were assembled together achieving a system-in-package. A direct-conversion BiCMOS tuner benefits from the low 1/f noise and high f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">tau</sub> bipolar transistors resulting in a lower noise figure in comparison with CMOS implementations. The on-chip LNA noise was reduced by using a noise cancellation technique that rejects the noise contribution of the input devices, eliminating the need for an external LNA. The DC offset cancellation loop capacitors were integrated on-chip by combining multiple offset loops with a Miller capacitance multiplication. The die area was significantly reduced by replacing the multi-oscillator solution used at present with a single high frequency Colpitts oscillator followed by a ratiometric frequency divider that generates the local oscillator signals for the entire satellite TV L-band.

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.