Notice of Violation of IEEE Publication Principles: Design of Cost Efficient Modular Digital QCA Circuits using Optimized XOR Gate

Abstract

Notice of Violation of IEEE Publication Principles “Design of Cost Efficient Modular Digital QCA Circuits using Optimized XOR Gate” by Suhaib Ahmed and Syed Farah Naz in IEEE Transactions on Circuits and Systems II: Express Briefs After careful and considered review of the content and authorship of this paper by a duly constituted expert committee, this paper has been found to be in violation of IEEE’s Publication Principles. This paper contains significant portions of original text from the paper cited below. The original text was copied without attribution (including appropriate references to the original author(s) and/or paper title) and without permission. “Design and Analysis of a Novel Low-Power Exclusive-OR Gate Based on Quantum-Dot Cellular Automata” By Haotian Chen, Hongjun Lv, Zhang Zhang, Xin Cheng and Guangjun Xie in Journal of Circuits, Systems, and Computers, Vol. 28, No. 8, 2017 The advantages such as high operating frequency (in the range of few THz), low power dissipation, small size and high density in the nano regime has led to the application of Quantum dot Cellular Automata (QCA) in designing various digital circuits. In this brief, an ultra-efficient two input XOR gate design in QCA is proposed. It is a single layer design consisting of only 9 cells with no crossover and operating on cell to cell interaction. The functionality of the proposed gate has been verified at both physical and simulation level. In addition to this, fault tolerance to single cell missing defect, single cell addition defect and single cell displacement defect of the proposed XOR gate has also been presented. Based on the performance evaluation, it is seen that the proposed XOR gate has least cell count, least area and least latency which in turn leads to least circuit cost. Also, the proposed design dissipates least energy. The applicability of proposed XOR gate has also been investigated by designing various cost efficient digital circuits such as full adder, parity checker, etc.